The following articles detail some of the research and development paths currently being pursued—and a technology innovation recently achieved—by engineers at Purdue University.
New Research Focuses on Keeping Today’s Hottest Electronics Cool for Users at Nanoscale Level
Thermal management works to absorb, dissipate heat created by chips in handheld phones and electric vehicles
By Brian Huchel
WEST LAFAYETTE, Ind.—Keeping today’s electronics cool isn’t as easy as running a fan installed at the rear of a desktop computer. Using anything from a smartphone to an electric vehicle results in some manner of heat production that eventually leads to the deterioration of the device.
Amy Marconnet, professor of mechanical engineering at Purdue University, is researching today’s wide range of technology to develop electronics cooling and thermal management techniques focusing on reducing the heat that’s produced, potentially resulting in improved device power and usage.
Electronics have a narrow temperature range where they can function efficiently. In an ever-evolving era of technology, there are a variety of ways to keep devices cool, even at a nanoscale level.
“On the semiconductor side, we’re mainly looking at improving thermal management to let electronics run at higher powers,” Marconnet said. “With wearable electronics, there’s tighter temperature controls required because it’s directly in contact with people at all times or when it’s in use and getting hot.”
That requirement has resulted in researching materials that can better transfer the heat in a system away from where it is building up without adding additional weight or manufacturing costs to the device.
Marconnet said phase change materials are one option her research is delving into. The materials provide thermal management by absorbing or releasing heat during the transition between melting or solidifying, depending upon the conditions. They also are being researched for the power electronics in electric vehicles.
“So, you can have the materials be melting while you’re, say, using your VR (virtual reality) goggles,” she said. “And then when you’re recharging your goggles or overnight, they will solidify, and you can use the device with higher intensity the next day.”
By melting, the phase change materials absorb the heat being produced, while solidifying again releases the heat. Marconnet recently researched using a metallic alloy as a phase change material within a chip to keep the system compact, yet effective. This work was spearheaded by Marconnet’s graduate student Meghavin Bhatasana.
Marconnet’s work receives funding from a consortium of companies as part of the Cooling Technologies Research Center at Purdue. She has published previous papers on thermal greases, a paste-like material that is put between a silicon chip and the heat-spreading components in the system.
Thermal greases eventually are “pumped out” of the area between the chips and other components, causing a device like a computer to drop in performance.
“We’re trying to figure out a fast test method right now for identifying which materials will perform well and which will perform poorly without having to wait for a year or more of an actual use of the system,” Marconnet said.
Thermal management also examines the part that batteries play in heat buildup, especially as the demand increases for faster charges, particularly in electric vehicles.
Marconnet compared heat buildup from charging a device battery to the light from an incandescent light bulb. While you get useful light from the bulb, it also gets hot. When charging a battery, you also get useful power, but heat is generated by the battery’s electrochemical reactions. So, while some of the power is being used for the chemical reactions that charge the battery, another portion of the power just gets wasted as heat in the device.
Marconnet and Xiulin Ruan, a professor in the School of Mechanical Engineering, already have worked to extend the life of devices by creating a compressible foam that can spread out heat building up, as well as offer insulation against colder temperatures. The Purdue Innovates Office of Technology Commercialization has filed a patent application for it.
Two new papers regarding Marconnet’s work on phase change materials have been submitted and are under review.
Purdue is a national leader in research and education involving microelectronics materials, devices, chip design, tool development, manufacturing, packaging, and sustainability, spanning the semiconductor ecosystem in software and hardware with long-standing faculty excellence. Strategic initiatives—such as the first comprehensive, large-scale Semiconductor Degrees Program, announced by Purdue in 2022—are intended to prepare the next generation of semiconductor industry workers, a cornerstone for advancing the field.
This article originally appeared in Purdue University News.
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Purdue Deep-Learning Innovation Secures Semiconductors Against Counterfeit Chips
RAPTOR technology exceeds the performance of traditional tampering detection methods by up to 40 percent.
By Steve Martin
WEST LAFAYETTE, Ind.—Researchers in Purdue University’s College of Engineering have developed a patent-pending optical counterfeit detection method for chips used in semiconductor devices.
The Purdue method is called RAPTOR, or residual attention-based processing of tampered optical responses. It leverages deep learning to identify tampering. It improves upon traditional methods, which face challenges in scalability and discriminating between natural degradation and adversarial tampering.
Alexander Kildishev, professor in the Elmore Family School of Electrical and Computer Engineering, leads a team whose research was published in the peer-reviewed journal Advanced Photonics.
“Our scheme opens a large opportunity for the adoption of deep learning-based anti-counterfeit methods in the semiconductor industry,” Kildishev said.
Kildishev disclosed RAPTOR to the Purdue Innovates Office of Technology Commercialization, which has applied for patents to protect the intellectual property. Industry partners interested in developing or commercializing RAPTOR should contact Will Buchanan, assistant director of business development and licensing — physical sciences, wdbuchanan@prf.org, about track code 70652.
Drawbacks in detecting counterfeit chips
Kildishev said the semiconductor industry has grown into a $500 billion global market over the last 60 years. However, it is grappling with dual challenges: a profound shortage of new chips and a surge of counterfeit chips, introducing substantial risks of malfunction and unwanted surveillance.
“The latter inadvertently gives rise to a $75 billion counterfeit chip market that jeopardizes safety and security across multiple sectors dependent on semiconductor technologies, such as aviation, communication, quantum, artificial intelligence, and personal finance,” he said.
Kildishev said several techniques have been created to affirm semiconductor authenticity and detect counterfeit chips.
“These techniques largely leverage physical security tags baked into the chip functionality or packaging,” he said. “Central to many of these methods are physical unclonable functions (PUFs), which are unique physical systems that are difficult for adversaries to replicate either because of economic constraints or inherent physical properties.”
Optical PUFs, which capitalize on the distinct optical responses of random media, are especially promising.
“However, there are significant challenges in achieving scalability and maintaining accurate discrimination between adversarial tampering and natural degradation, such as physical aging at higher temperatures, packaging abrasions, and humidity impact,” Kildishev said.
Creating Purdue’s RAPTOR
Kildishev and his team drew inspiration for RAPTOR from the capabilities of deep-learning models.
“RAPTOR is a novel deep-learning approach, a discriminator that identifies tampering by analyzing gold nanoparticle patterns embedded on chips,” he said. “It is robust under adversarial tampering features, such as malicious package abrasions, compromised thermal treatment, and adversarial tearing.”
Yuheng Chen, a doctoral student in Kildishev’s group, said RAPTOR uses the distance matrix verification of gold nanoparticles.
“The gold nanoparticles are randomly and uniformly distributed on the chip sample substrate, but their radii are normally distributed. An original database of randomly positioned dark-field images is created through dark-field microscopy characterization,” Chen said. “Gold nanoparticles can easily be measured using dark-field microscopy. This is a readily available technique that can integrate seamlessly into any stage of the semiconductor fabrication pipeline.”
Blake Wilson, an alumnus of Kildishev’s group, said, “RAPTOR uses an attention mechanism for prioritizing nanoparticle correlations across pre-tamper and post-tamper samples before passing them into a residual attention-based deep convolutional classifier. It takes nanoparticles in descending order of radii to construct the distance matrices and radii from the pre-tamper and post-tamper samples.”
Validating Purdue’s RAPTOR
The Purdue team tested RAPTOR’s counterfeit detection capability by simulating the tampering behavior in nanoparticle systems. This included natural changes, malicious adversarial tampering, thermal fluctuations, and varying degrees of random Gaussian translations of the nanoparticles.
“We have proved that RAPTOR has the highest average accuracy, correctly detecting tampering in 97.6 percent of distance matrices under worst-case scenario tampering assumptions,” Wilson said. “This exceeds the performance of the previous methods—Hausdorff, Procrustes, and Average Hausdorff distance—by 40.6 percent, 37.3 percent, and 6.4 percent, respectively.”
Kildishev said the team is planning to collaborate with chip-packaging researchers to further innovate the nanoparticle embedding process and streamline the authentication steps.
“At the moment, RAPTOR is a proof of concept that demonstrates AI’s great potential in the semiconductor industry,” he said. “Ultimately, we want to convert it into a mature industry solution.”
Other RAPTOR team members include Alexandra Boltasseva, the Ron and Dotty Garvin Tonjes Distinguished Professor in Electrical and Computer Engineering; Vladimir Shalaev, the Bob and Anne Burnett Distinguished Professor in Electrical and Computer Engineering; and current and former students Daksh Kumar Singh, Rohan Ojha, Jaxon Pottle and Michael Bezick.
The team has received support from the U.S. Department of Energy’s Quantum Science Center, the National Science Foundation, and the Elmore ECE Emerging Frontiers Center on the Crossroads of Quantum and AI.
The Purdue Innovates Office of Technology Commercialization operates a comprehensive technology transfer program. Services provided by this office support the economic development initiatives of Purdue University and benefit the university’s academic activities through commercializing, licensing, and protecting Purdue intellectual property.
In fiscal year 2024, the office reported 145 deals finalized with 224 technologies signed, 466 invention disclosures received, and 290 U.S. and international patents received. The office is managed by the Purdue Research Foundation, a private, nonprofit foundation created to advance the mission of Purdue University. Contact otcip@prf.org for more information.
This article originally appeared in Purdue University News.
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Purdue Receives Grant Funding in All Three Areas of NSF Semiconductor Research Program
WEST LAFAYETTE, Ind.—The National Science Foundation (NSF) and several corporate partners are relying on Purdue University researchers to improve semiconductor performance and energy efficiency with new research grants announced by the National Science Foundation NSF) on September 16.
Purdue is the only university chosen by the review panels and NSF to lead research in each of three topic areas and will receive more than $5 million. The NSF announced the grants in partnership with Ericsson, Intel Corp., Micron Technology Inc. and Samsung Electronics Co. Ltd. Each was issued as part of the Future of Semiconductors (NSF FuSe2) competition to advance U.S. leadership in semiconductor research and innovation and to address key challenges in the field.
The grants support the goals of the 2022 CHIPS and Science Act to ensure long-term leadership in the microelectronics sector and nationwide economic growth. The funding for Purdue will support research to develop innovative materials and designs that will lead to faster, more efficient chips for use in everything from smartphones to AI systems.
Semiconductor research is a key pillar of Purdue Computes, a strategic university initiative to further scale Purdue’s research and educational excellence.
“These grants will build on and expand the critical semiconductor research that Purdue is known for throughout the world,” said Karen Plaut, executive vice president for research. “Receiving grants from the NSF and major semiconductor corporations in each of the available topic areas underscores Purdue’s reputation as a leader in chips research.”
The new grants support these Purdue projects:
- Bridging Atomic Layers and Foundation Models: An Indium-Oxide-Based Versatile Neural Computing Platform. This work focuses on creating new computing systems using indium oxide, a material that is only a few atomic layers thick. This platform mimics the way human brains process information, which could lead to smarter, faster, and more energy-efficient AI systems. The project will be led by Haitong Li, assistant professor of electrical and computer engineering, with Peide Ye, the Richard J. and Mary Jo Schwartz Professor of Electrical and Computer Engineering, and Anand Raghunathan, the Silicon Valley Professor of Electrical and Computer Engineering.
- High-Resolution Imaging of Defects in Semiconductors: Detection, Reliability, and Mitigation. This project will use advanced imaging techniques to find and study minute defects in semiconductor materials. Detecting defects at a very detailed level early in the manufacturing process helps improve semiconductor quality, performance, and reliability. Leading this study is Nikhilesh Chawla, the Ransburg Professor in Materials Engineering, with Charles Bouman, the Showalter Professor of Electrical and Computer Engineering; Hany Abdel-Khalik, professor of nuclear engineering; and Eshan Ganju, postdoctoral researcher in materials engineering.
- Strain and Temperature Ex-Situ Processing of Ferroelectric Oxides (STEP FOx) for BEOL Performance. This research is aimed at improving the processing methods of ferroelectric oxides. By carefully controlling the temperature and stress on the material during manufacturing, the researchers hope to enhance the material’s performance, which will help create more reliable and efficient electronic devices, especially in the “back-end-of-line” (BEOL) stages, which are key in the production of advanced computer chips. This work is being led by Thomas Beechem, associate professor of mechanical engineering.
Purdue investigators also are participating in a team led by Texas A&M:
- SPRINT: Scalable, High Performance, and Reliable Interconnect Technologies Based on Interface Co-Design. This project aims to develop a new way to synthesize copper nanowires and design effective encapsulation layers based on two-dimensional materials. These break the paradigm-limiting current interconnect technology and enable next-generation high-performance and energy-efficient computer chips. Participating are Zhihong Chen, professor of electrical and computer engineering, and Sumeet Gupta, Elmore Associate Professor of Electrical and Computer Engineering.
“The nation’s semiconductor challenge is a Purdue priority,” said Mark Lundstrom, chief semiconductor officer and head of the university’s Semiconductor Task Force. “This funding from NSF and its corporate partners confirms that the work we are doing is critical to the advancement of the U.S. chip industry and all the current and future technological necessities that rely on it.”
This article originally appeared in Purdue University Research News.
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